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 SSM2305AGN
P-channel Enhancement-mode Power MOSFET
Low gate-charge Simple drive requirement Fast switching
Pb-free; RoHS compliant.
D
BV DSS R DS(ON) ID
-30V 80m -3.2A
G S
DESCRIPTION
D
The SSM2305AGN is in a SOT-23-3 package, which is widely used for lower power commercial and industrial surface mount applications. This device is suitable for low-voltage applications such as DC/DC converters and and SOT-23-3 general switching applications.
S G
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VGS ID @ TA=25C ID @ TA=70C IDM PD @ TA=25C TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current
1,2
3 3
Rating -30 12 -3.2 -2.6 -10 1.38 0.01 -55 to 150 -55 to 150
Units V V A A A W W/C C C
Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range
THERMAL DATA
Symbol RJA Parameter Maximum Thermal Resistance, Junction-ambient
3
Value 90
Unit C/W
2/16/2005 Rev.2.1
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SSM2305AGN
ELECTRICAL CHARACTERISTICS (at Tj = 25C unless otherwise specified)
Symbol BVDSS Parameter Drain-Source Breakdown Voltage Test Conditions VGS=0V, ID=-250uA Min. -30 -0.5 Typ. -0.1
Max. Units 60 80 150 250 -1.2 -1 -25 100 18 1325 V V/C m m m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
BV DSS/ Tj
RDS(ON)
Breakdown Voltage Temperature Coefficient Reference to 25C, ID=-1mA
Static Drain-Source On-Resistance
VGS=-10V, ID=-3.2A VGS=-4.5V, ID=-3.0A VGS=-2.5V, ID=-2.0A VGS=-1.8V, ID=-1.0A
9 10 1.8 3.6 7 15 21 15 735 100 80
VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Gate Threshold Voltage Forward Transconductance
Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C)
o o
VDS=VGS, ID=-250uA VDS=-5V, ID=-3.0A VDS=-30V, VGS=0V VDS=-24V, VGS=0V VGS= 12V ID=-3.2A VDS=-24V VGS=-4.5V VDS=-15V ID=-3.2A RG=3.3 , VGS=-10V RD=4.6 VGS=0V VDS=-25V f=1.0MHz
Gate-Source Leakage Total Gate Charge
2
Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
2
Source-Drain Diode
Symbol VSD trr Qrr Parameter Forward On Voltage
2
Test Conditions IS=-1.2A, VGS=0V IS=-3.2A, VGS=0V, dI/dt=100A/s
Min. -
Typ. 24 19
Max. Units -1.2 V ns nC
Reverse Recovery Time Reverse Recovery Charge
Notes:
1.Pulse width limited by maximum junction temperature. 2.Pulse width <300us, duty cycle <2%. 3.Surface-mounted on 1 in2 copper pad on FR4 board ; 270C/W when mounted on minimum copper pad.
2/16/2005 Rev.2.1
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SSM2305AGN
40 36
T A =25 o C -5.0V -ID , Drain Current (A)
30
32
TA=150oC
-5.0V -4.0V
28
-ID , Drain Current (A)
-4.0V
24
20
20
-3.0V
-3.0V
16
12
10
V G = -2.0V
8
V G = -2.0V
4
0 0 1 2 3 4 5 6 7 8 9
0 0 1 2 3 4 5 6 7
-V DS , Drain-to-Source Voltage (V)
-V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
300
1.8
I D = -1.0A T A =25 o C RDS(ON) (m )
200 1.6
I D = -3.0A V GS = -4.5V
Normalized RDS(ON)
0 2 4 6 8 10 12
1.4
1.2
100
1
0.8
0
0.6 -50 0 50 100 150
-V GS , Gate-to-Source Voltage (V)
T j , Junction Temperature ( o C)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance vs. Junction Temperature
1.5
100
10
1
1
-VGS(th) (V)
0.5 0 -50
T j =150 o C
-IS(A)
T j =25 o C
0.1
0.01 0 0.4 0.8 1.2 1.6
0
50
100
150
-V SD , Source-to-Drain Voltage (V)
T j , Junction Temperature (
o
C)
Fig 5. Forward Characteristic of Reverse Diode
2/16/2005 Rev.2.1
Fig 6. Gate Threshold Voltage vs. Junction Temperature
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3 of 5
SSM2305AGN
12
10000
f=1.0MHz
10
-VGS , Gate to Source Voltage (V)
I D = -3.2A V DS = -24V
8
1000
Ciss
6
4
C (pF)
100
Coss Crss
2
0
0 2 4 6 8 10 12
10 1 5 9 13 17 21 25 29
Q G , Total Gate Charge (nC)
-V DS , Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
DUTY=0.5
Normalized Thermal Response (Rthja)
0.2
10
0.1
0.1
0.05
-ID (A)
1
1ms
PDM t
0.01
T
Duty factor = t/T Peak T j = PDM x Rthja + Ta
10ms
0.1
0.01
Single pulse
100ms T A =25 C Single Pulse
o
Rja = 270C/W
1s DC
10 100
0.01 0.1 1
0.001 0.0001 0.001 0.01 0.1 1 10 100 1000
-V DS , Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
VDS 90%
VG QG -4.5V QGS QGD
10% VGS td(on) tr td(off) tf Charge Q
Fig 11. Switching Time Circuit
2/16/2005 Rev.2.1
Fig 12. Gate Charge Circuit
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SSM2305AGN
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.
2/16/2005 Rev.2.1
www.SiliconStandard.com
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